- D.Nakamura, H. Yoshida, S.Komatsu, M.Sasaki, M.Ikeda and K.Asada,
" Implementation and Chip Size Evaluation of an Realtime Onchip Monitoring System for Reliability of LSI,"
IEICE General Conference,, Mar. 2009 , (in Japanese).
- K. Asada
"Nanotech-Net Project as an Academic-Industry Collaboration Platform,"
the 8th Taiwan-Japan Microelectronics Symposium 2008, 1-2, Dec.2008.
- M. Ikeda
"Self-Synchronous Architecture for Power Optimal Operations against PVT Variations,"
the 8th Taiwan-Japan Microelectronics Symposium 2008, 4-6, Dec.2008.
- S. Mandai, T. Monma, T. Nakura, M. Ikeda, and K. Asada,
"Multi Functional Range Finder Employing a Dual Imager Core on a Single Chip,"
International SoC Design Conference, Pusan, Korea, pp.89-92,Nov. 2008,
- K. Ikai, J. Kim, M. Ikeda, and K. Asada,
"Digital Integrated Circuit Design for System-on-Glass,"
International SoC Design Conference, pp. 172-175, Pusan, Korea, Nov. 2008,
- Y.K. Kim, M. Ikeda, and K. Asada,
"Analysis on light attenuation through Multi-Metal-Layers for CMOS image sensors on System LSIs,"
International SoC Design Conference, Pusan, Korea, No.94, Nov. 2008,
- Shingo Mandai, Taihei Monma, Toru Nakura, Makoto Ikeda, and Kunihiro Asada,
"Multi Functional Range Finder Employing a Dual Imager Core on a Single Chip,"
In-ternational SoC Design Conference, IEEE CAS Seoul Chapter Best Paper Award(Oral Session), Nov. 2008,
- M. Ikeda
"Self-synchronous architecture for margin aware operations against PVT variations,"
Shanghai Jiao Tong University – University of Tokyo Joint Symposium on Electronics, Information Technology, and Electrical Engineering,D-2, Oct.2008.
- J. Kim, K. ikai, T. Nakura, M. Ikeda, K. Asada,
"Variation Tolerant Transceiver Design for System -on-
Glass,"
in IEEE 34th European Solid State Circuits Conference (Fringe Section), Sep. 2008,
- Y. Yachide , M. Ikeda, and K. Asada,
"Multiple-Rangefinders Calibration Based on Light-Section Method Using Spheres,"
Smart Sensors and Sensing Technology, Springer Berlin Heidelberg, Part IX, pp. 285-298, Jul. 2008,
- M. Ikeda,
"Smart Image Sensors,"
University of Tokyo – INRIA – Ecole des Mines Paris – INRETS Joint Symposium on Electronics for Secure Life Jul.2008.
- Y.Yachide, M. Ikeda, and K. Asada,
"Time-Division-Based Multiple-Viewpoint 3-D Measurement System for Real-Time, High-Speed, and High-Accuracy Model Movie Acquisition,"
Journal of Image Information and Television Engineers, Vol. 62, No.3, pp. 392 -- 397, Mar. 2008,
- T. Sogabe, M. Ikeda and K. Asada,
"SA Self-timed Processor with Dynamic Voltage Scaling,"
VLD2007-158, ICD2007-181, pp. 13-18Mar. 2008, (in Japanese).
- U.H. Kim,
"3D Modeling Method for Associative Processor,"
Prof. IIITE, Mar. 2008, (in Japanese).
- Hai Dinh Minh Pham, T. Iizuka, M.Ikeda, and K.Asada,
"Shot Minimization for Throughput Improvement of Character Projection Electron Beam Direct Writing,"
in Proc. of the SPIE (Emerging Lithographic Technologies XII), Vol. 6921, pp. 69211U-69211U-10, Feb. 2008,
- M. Ikeda
"Wide Dynamic Range on Pixel Level,"
ISSCC2008, Imager Design Forum: Wide-Dynamic-Range Imaging, Feb.2008.
- K. Ikai, J. Kim, M. Ikeda, and K. Asada,
"Circuit Design using Stripe-Shaped TFTs on Glass"
Proceedings of IEEE Asia and South Pacific Design Automation Conference, pp. 105-106, Jan. 2008,
- M. Sasaki, M. Ikeda and K. Asada,
“A Temperature Sensor With an Inaccuracy of -1/+0.8℃ Using 90-nm 1-V CMOS for Online Thermal Monitoring of VLSI Circuits,”
IEEE Transactions,Vol.21, Issue 2, pp.201-208, 2008,
- K. Asada
"Introduction to VDEC activities for design and Manufacturing in microelectronics,"
University of Tokyo – UC Santa Barbara Joint Workshop Sept.2008.
- M. Ikeda
"Delay Variation Measurements on DCVSL Using Logic Tester,"
University of Tokyo – UC Santa Barbara Joint Workshop Sept.2008.