Ikeda Lab.

Journal

  • Z. Wang, M. Ikeda, "High-throughput and fully-pipelined ciphertext multiplier for homomorphic encryption", IEICE Electronics Express, vol. 21, no. 6, pp. 20230628–20230628, 2024, doi: 10.1587/elex.21.20230628.
  • P. Sun, M. Ikeda, "A Pipelined NTT Transformer and its Extension Scheme Designed for the Digital Signature Scheme Crystals-Dilithium", IEICE Tech. Rep., vol. 123, no. 391, HWS2023-90, pp. 161-166, Feb. 2024.
  • M. Fukuda, M. Ikeda, "Template-based design optimization for selecting pairing-friendly curve parameters", IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Apr 2023.
  • K. Abe, M. Ikeda, "Estimating the Effectiveness of Lattice Attacks", IACR Cryptology ePrint Archive, Nov 2021
  • Daigo Takahashi, Tetsuya Iizuka, Nguyen Ngoc Mai-Khanh, Toru Nakura, Kunihiro Asada, "Fault Detection of VLSI Power Supply Network based on Current Estimation from Surface Magnetic Field", IEEE Transactions on Instrumentation and Measurement,vol. 68, no. 7, pp. 2519 - 2530,Jul.2019.
  • Yoshitaka Otsuki, Daisuke Yamazaki, Nguyen Ngoc Mai-Khanh, Tetsuya Iizuka, "A 140 GHz Area-and-Power-Efficient VCO using Frequency Doubler in 65 nm CMOS", IEICE Electronics Express,vol. 16, no. 6, pp. 1 - 5,Mar.2019.
  • Ryuichi Enomoto, Tetsuya Iizuka, Takehisa Koga, Toru Nakura, Kunihiro Asada, "A 16-bit 2.0-ps Resolution Two-Step TDC in 0.18-µm CMOS utilizing Pulse-Shrinking Fine Stage with Built-In Coarse Gain Calibration", IEEE Transactions on Very Large Scale Integration Systems, vol. 27, no. 1, pp. 11 - 19,Jan.2019.
  • Parit Kanjanavirojkul, Nguyen Ngoc Mai-Khanh, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada, "Analysis and Design of Impulse Signal Generator based on Current-Mode Excitation and Transmission Line Resonator", Springer Journal of Analog Integrated Circuits and Signal Processing,vol. 97, no. 3, pp. 457 - 470,Dec.2018.
  • Tetsuya Iizuka,Asad A. Abidi, "A Unified Analysis of the Signal Transfer Characteristics of a Single-Path FET-R-C Circuit", IEICE Transactions on Electronics, vol. E101-C, no. 7, pp. 432-443,Jul.2018.
  • Toru Nakura, Tsukasa Kagaya, Tetsuya Iizuka, Kunihiro Asada, "Quick-Start Pulse Width Controlled PLL with Frequency and Phase Presetting", IEICE Transactions on Electronics, vol. E101-C, no. 4, pp. 218 - 223,Apr.2018.
  • Masahiro Kano, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada, "Triangular Active Charge Injection Method for Resonant Power Supply Noise Reduction", IEICE Transactions on Electronics, vol. E101-C, no. 4, pp. 292 - 298,Apr.2018.
  • Naoki Terao, Toru Nakura, Masahiro Ishida, Rimon Ikeno, Takashi Kusaka, Tetsuya Iizuka, Kunihiro Asada, "Digitally-Controlled Compensation Current Injection to ATE Power Supply for Emulation of Customer Environment", Springer Journal of Electronic Testing: Theory and Applications, vol. 34, no. 2, pp. 147 - 161,Apr.2018.
  • Tetsuya Iizuka, Takaaki Ito, Asad A. Abidi, "Comprehensive Analysis of Distortion in the Passive FET Sample-and-Hold Circuit", IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 65, no. 4, pp. 1157 - 1173,Apr.2018.
  • Nguyen Ngoc Mai-Khanh, Shigeru Nakajima, Tetsuya Iizuka, Yoshio Mita, and Kunihiro Asada, "Noninvasive Localization of IGBT Faults by High-Sensitivity Magnetic Probe with RF Stimulation", IEEE Transactions Instrumentation & Measurement, Vol. 67, No. 4, pp. 745 - 753,Apr.2018.
  • Shotaro Sugiyama, Hiromitsu Awano, Makoto Ikeda, "Low Latency 256-bit Fp ECDSA Signature Generation Crypto Processor", IEICE Trans. Fundamentals, vol. 101, no. 12, pp. 2290 - 2296,Mar.2018.
  • Nguyen Ngoc Mai-Khanh, and Kunihiro Asada, "A CMOS Broadband Transceiver with On-Chip Antenna Array and Built-in Pulse-Delay Calibration for Millimeter-Wave Imaging Application", IEICE Transactions on Electronics, Vol. E100-C, No. 12, pp. 1078 - 1086,Dec.2017.
  • Tomohiko Yano, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada, "A Gate Delay Mismatch Tolerant Time-Mode Analog Accumulator Using a Delay Line Ring", IEICE Transactions on Electronics, vol. E100-C, no. 9, pp. 736 - 745,Sep.2017.
  • Kunihiro Asada, Toru Nakura, Tetsuya Iizuka, Makoto Ikeda, "Time-Domain Approach for Analog Circuits in Deep Sub-Micron LSI", IEICE Electronics Express, vol. 15, no. 6, pp. 1 - 21,Mar.2017.
  • Md. Maruf Hossain, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada, "Optimal Design Method of Sub-Ranging ADC Based on Stochastic Comparator", IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E101-A, no. 2, pp. 410 - 424,Feb.2017.
  • Toru Nakura, Tetsuya Iizuka, Kunihiro Asada, "A PLL Compiler from Specification to GDSII", IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E100-A, no. 12, pp. 2741 - 2749,Feb.2017.