- T. Ikeda, M. Ikeda,
"Implementation of RSA Cryptographic Circuit with High Radix Arithmetic Unit and Asynchronous Control(高基数演算器を用いたRSA暗号回路の非同期制御による実装),"
in Proceedings of the 2015 IEICE Society Conference, A-3-12,Sep.2015.
- Chuanqi Cui, M. Ikeda,
"Evaluation of SEU Tolerance of Self-synchronous System Based on Dynamic Circuits(ダイナミック回路を用いた自己同期システムの SEU 耐性の評),"
in Proceedings of the IEICE Society Conference, A-3-9,Sep.2015.
- Xiao Yang, Hongbo Zhu, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada,
"A CMOS SPAD Sensor Featuring Asynchronous Event-Extraction Readout Architecture for Faint Light Detection,"
in Proceedings of 2015 International Conference on Solid State Devices and Materials (SSDM), pp. 812-813,Sep.2015.
- M. Kano, T. Nakura and K. Asada,
"Resonant Power Supply Noise Cancelling with Noise Detector based in DLL and Vernier TDC,"
in Proceedings of IEEE Asia Symposium on Quality Electronic Design (ASQED), pp.192-196,Aug.2015.
- Nguyen Ngoc Mai-Khanh, Tetsuya Iizuka, Akihiko Sasaki, Makoto
Yamada, Osamu Morita, and Kunihiro Asada,
"A Near-Field Magnetic Sensing System with High-Spacial Resolution
and Application for Security of Cryptographic LSIs,"
IEEE Trans. on Instrumentation & Measurement, Vol. 64, No. 4, pp.840-848,Apr.2015.
- Xiao Yang, Hongbo Zhu, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada,
"An Asynchronous Projection and Summation Circuit for In-Pixel Processing in Single Photon Avalanche Diode Sensors,"
in Proceedings of IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), pp. 131-136,Apr.2015.
- Xiao Yang, Hongbo Zhu, Toru Nakura, Kunihiro Asada,
"Single Photon Avalanche Diode Based on Standard CMOS Technology(標準CMOS技術による単一光子アバランシェフォトダイオード),"
in Proceedings of the 2015 IEICE General Conference, C-12-39,Mar.2015.
- K. Mori, T. Nakura, T. Iizuka, and K. Asada,
"An Accelerating Method of NBTI Degradation Transition Analysis Utilizing its Frequency Dependence(NBTIの周波数依存性を利用した劣化過渡解析の高速 化手法),"
in Proceedings of the 2015 IEICE General Conference, A-2-29,Mar.2015.
- Chuanqi Cui, M. Ikeda,
"Layout Area Estimation for Evaluation of SEU Tolerance(SEU耐性評価のためのレイアウト面積の概算),"
in Proceedings of the IEICE General Conference, C-12-25,Mar.2015.
- Nguyen Ngoc Mai-Khanh, Tetsuya IIZUKA, Shigeru NAKAJIMA, and
Kunihiro ASADA,
"Spacial Resolution Enhancement of Integrated Magnetic Probe by
Two-Step Removal of Si-Substrate Beneath the Coil,"
IEEE Trans. on Magnetics Vol. 51, No. 1,Jan.2015.
- K. Mori, T. Nakura, T. Iizuka, and K. Asada,
"An accelerating method of NBTI degradation transition analysis based on logic simulation(論理シミュレーションにもとづいたNBTI劣化過渡解 析の高速化手法),"
ICD2014-109,CPSY2014-121, pp.141-145, Dec. 2014.
- Takahiro J. Yamaguchi, James S. Tandon, Satoshi Komatsu, Kunihiro Asada,
"A Novel Circuit for Transition-Edge Detection: Using a Stochastic Comparator Group to Test Transition-Edge,"
2014 IEEE 23rd Asian Test Symposium (ATS), pp. 168-173, Nov. 2014.
- Masahiro Ishida, Takashi Kusaka, Toru Nakura, Satoshi Komatsu, and Kunihiro Asada,
"Statistical Silicon Results of Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills,"
IEEE International Test Conference, pp. 1-10, Oct. 2014.
- Rimon Ikeno, Takashi Maruyama, Satoshi Komatsu, Tetsuya Iizuka, Makoto Ikeda, and Kunihiro Asada,
"A Structured Routing Architecture for Practical Application of Character Projection Method in Electron-Beam Direct Writing,"
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences,vol. E97-A, no. 8, pp. 1688 - 1698,Aug. 2014.
- N. N. Mai-Khanh, T. Iizuka, S. Nakajima, and K. Asada,
"Spacial Resolution Enhancement for Integrated Magnetic Probe by Two-Step Removal of Si-Substrate Beneath the Coil,"
in 10th European Conference on Magnetic Sensors and Actuators (EMSA), Vienna, Austria, pp. 11, Jul. 2014.
- James S. Tandon, Takahiro J. Yamaguchi, Satoshi Komatsu, Kunihiro Asada,
"A subsampling stochastic coarse-fine ADC with SNR 55.3 dB and >5.8 TS/s effective sample rate for an on-chip signal analyzer"
2014 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 93-96, Jun. 2014.
- Satoshi Komatsu, Takahiro J. Yamaguchi, Mohamed Abbas, Nguyen Ngoc Mai Khanh, James S. Tandon, Kunihiro Asada,
"A Flash TDC with 2.6-4.2ps Resolution Using a Group of Unbalanced CMOS Arbiters,"
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Vol.E97-A, No.3, pp. 777-780,Mar.2014.
- H.Yabe and M.Ikeda,
"Line Position Detection Using Minimum Voltage Circuits on the Pixel Plane,"
in IEICE General Conference,C-12-15, Mar.2014
- N. N. Mai-Khanh, T. Iizuka, A. Sasaki, M. Yamada, O. Morita, and K. Asada,
"High-Resolution Measurement of Magnetic Field Generated from Cryptographic LSIs,"
in Proceedings of IEEE Sensors Applications Symposium (SAS), Feb. 2014.
- Chuanqi Cui, M. Ikeda,
"Error Tolerance of Dual Pipeline Self Synchronous Circuits(ゲートレベルパイプライン型自己同期回路のエラー耐性の評価),"
電子情報通信学会VLSI設計研究会，信学技報, vol. 114, no. 59, VLD2014-7, pp. 33-38, May 2014.