- Y. Oike, M. Ikeda, and K. Asada,
"HA 375 x 365 3D 1k frame/s Range-Finding Image Sensor with 394.5 kHz Access Rate and 0.2 Sub-Pixel Accuracy,"
IEEE International Solid-State Circuits Conference (ISSCC) Dig. of Tech, Papers, pp. 118 - 119,Feb. 2004,
- Y. Oike, M. Ikeda, and K. Asada,
"A 375x365 3D 1k frame/s Range-Finding Image Sensor with 394.5kHz Access Rate and 0.2 Sub-Pixel Accuracy,"
IEEE International Solid-State Circuits Conference (ISSCC) Deg. of Tech. Papers, pp.118-119,Feb. 2004.
- Y. Oike, M. Ikeda, and K. Asada,
"A 120 x 110 Position Sensor With the Capability of Sensitive and Selective Light Detection in Wide Dynamic Range for Robust Range Finding,"
IEEE Journal of Solid-State Circuits, Vol. 39, No. 1, pp. 246 - 251, Jan. 2004,
- Y. Oike, M. Ikeda, and K. Asada,
"Design of Real-Time VGA 3-D Image Sensor Using Mixed-Signal Techniques,"
in Proc. of IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 523 - 524,Jan. 2004,
- T. Iizuka, M. Ikeda, and K. Asada,
"High Speed Layout Synthesis for Minimum-Width CMOS Logic Cells via Boolean Satisfiability,"
in Proc. of IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 149 - 154,Jan. 2004,
- U. Ekinciel, H. Yamaoka, H. Yoshida, M. Ikeda, and K. Asada,
"Constraint Driven Dual-Rail PLA Module Generator with Embedded 2-Input Logic Cells,"
in Proc. of IEEE Mediterranean Electrotechnical Conference (MELECON), pp. 189 -- 192,May 2004,
- Y. Oike, M. ikeda, and K. Asada,
"Design of Real-Time VGA 3-D Image Sensor Using Mixed-Signal Techniques,"
IEEE Asia and South Pacific Design Automation Conference (ASP-DAC)Jan.. 2004,(the Best Design Award).
- Y. Oike, M. Ikeda, and K. Asada,
"An Image Sensor with High-Speed Feeble ID Beacon Detection for Augmented Reality System,"
in Proc. of ITE Winter Conference 2003, 4-1, pp. 34,Dec. 2003,
- Y. Oike, M. Ikeda, and K. Asada,
"A Row-Parallel Position Detector for High-Speed 3-D Camera Based on Light-Section Method,"
IEICE Trans. on Electronics, Vol. E86-C, No. 11, pp. 2320 - 2328, Nov. 2003,
- T. Iizuka, M. Ikeda, and K. Asada,
"Exact Wiring Fault Minimization via Comprehensive Layout Synthesis for CMOS Logic Cells,"
IEICE Technical Report, vol. 103, no. 476, pp. 157 - 161,Nov. 2003,
- T. Nakura, M. Ikeda, and K. Asada,
"Power Supply Noise Reduction using Stubs,"
IEICE Technical Report, vol. 103, no. 476, pp. 217 - 222,Nov. 2003,
- Y. Oike, M. Ikeda, and K. Asada,
"High Performance Photo Detector for Correlative Feeble Lighting Using Pixel-Parallel Sensing,"
IEEE Sensors Journal, vol. 3, no. 5, pp. 640 - 645, Oct. 2003,
- Y. Oike, H. Shintaku, S. Takayama, M. Ikeda, and K. Asada,
"Real-Time and High-Resolution 3-D Imaging System Using Light-Section Method and Smart CMOS Sensor,"
in Proc. of IEEE International Conference on Sensors (IEEE SENSORS), pp. 502 - 507,Oct. 2003,
- Y. Oike, M. Ikeda and K. Asada,
"High-Performance Photo Detector for Correlative Feeble Lighting Using Pixel-Parallel Sensing,"
IEEE Sensors Journal 2002 Sensors Conf. Florida, Vol.3, No.5, pp.640-645,Oct. 2003,
- Y. Oike, H. Shintaku, M. Ikeda, and K. Asada,
"A High-Resolution and Real-Time 3-D Imaging System Based on Light-Section Method,"
Journal of Image Information and Television Engineers, Vol. 57, No. 9, pp. 1149 - 1151, Sep. 2003,
- Y. Oike, M. Ikeda, and K. Asada,
"A Smart Image Sensor With High-Speed Feeble ID-Beacon Detection for Augmented Reality System,"
in Proc. of European Solid-State Circuits Conference (ESSCIRC), pp.125 - 128,Sep. 2003,
- H. Yamaoka, M. Ikeda, and K. Asada,
"A High-Speed Logic Circuit Family with Interdigitated Array Structure for Deep Sub-Micron IC Design,"
Proceedings of European Solid-State Circuits Conference (ESSCIRC), pp. 189-192, Portugal,Sep. 2003,
- Y. Oike, M. Ikeda, and K. Asada,
"A High-Speed and Low-Voltage Associative Co-Processor With Hamming Distance Ordering Using Word-Parallel and Hierarchical Search Architecture,"
in Proc. of IEEE Custom Integrated Circuits Conference (CICC), pp.643 - 646,Sep. 2003,
- T. Nakura, M. Ikeda, and K. Asada,
"Theoretical Study of Stubs for Power Line Noise Reduction,"
in Proc. of IEEE Custom Integrated Circuits Conference (CICC), 31-4, pp.715-718, Sep. 2003,
- Y. Oike, M. Ikeda and K. Asada,
"A High-Speed and Low-Voltage Associative Co-Processor With Hamming Distance Ordering Using Word-Parallel and Hierarchical Search Architecture,"
in Proc. of IEEE Custom Integrated Circuits Conference (CICC), pp.643-646,Sep. 2003,