- M. Lee and K. Asada,
"Sub-100nm CMOS/SIMOX Delay Modeling by Time-Dependent Gate Capacitance Model,"
1993 Int. Symp. on VLSI Tech., Systems, and Appl., pp.242-246, 1993,
- H. Zhang and K. Asada,
"An Improved Algorithm of Transistors Pairing for Compact Layout of Non-series-parallel CMOS Networks,"
IEEE Proc. Custom Integrated Circuits Conf., pp.17.2.1-17.2.4, 1993,
- M. Fujishima, M. Ikeda, K. Asada, Y. Omura, and K. Izumi,
"Analytical Modeling of Dynamic Performance of Deep Sub-micron SOI/SIMOX Based on Current-Dwlay Product,"
IEICE TRANS. ELECTRON.,, Vol.E75-C, No.12, Dec. 1992,
- M. Fujishima, M. Ikeda, K. Asada, Y. Omura, and Y. Izumi,
"Analytical Modeling of Dynamic Performance of Deep Submicron SOI/SIMOX Based on Current-Delay Product,"
IEICE Trans. on Electronics, Vol. E75-C, No.12, Dec. 1992,
- 張 洪明 and 浅田 邦博,
(in Japanese) "非直並列CMOS回路のレイアウト最適化手法,"
1992年電子情報通信学会 秋季全国大会, A-61, Sep. 1992,
- M. Fujishima, M. Yamashita, M. Ikeda, K. Asada, Y. Omura, K. Izumi, T. Sakai, and T. Sugano,
"1GHz 50 μW 1/2 Frequency Divider Fabricated on Ultra-thin SIMOX Substrate,"
IEEE 1992 Symposium on VLSI Circuit Digest of Technical Papers, 5-4, pp.46-47, Jun. 1992,
- M. Fujishima, K. Asada, T. Sasaki, M. Yamashita, Y. Omura, M. Ikeda, K. Izumi, and T. Sugano,
"1 GHz 50μ 11/8 Frequency Divider Fabricated on Ultra-thin SIMOX Substrate,"
IEEE 1992 Symposium on VLSI Circuit, Digest of Technical Papers,5-4, pp.46-47, Jun. 1992,
- K. Asada, K. Ohkura, and K. R. Cho,
"Design of Self-Timed Data Path for a Fully Asynchronus Microprocessor,"
SASIMI '92, pp.HLII-1, Apr. 1992,
- H. Zhang and K. Asada,
"A General and Efficient Mask Pattern Generator For Non-Series-Parallel CMOS Transistor Network,"
WG10.5 IFIP Workshop on Synthesis, Generation and Portability of Library Blocks for ASIC Design (France), pp.132-138, Mar. 1992,
- 趙 慶録, 大蔵 一真, and 浅田 邦博,
(in Japanese) "非同期マイクロプロセッサの制御回路,"
ＦＴＣ研究会, Vol.FTC-26,No.1, 1992,
- 藤島 実, 浅田 邦博, and 菅野 卓雄,
"Evaluation of Dynamic Load Capacitance of CMOS Circuits,"
第３９回応用物理学関係連合講演会, 30p-ZM-13,pp.726, 1992,
- 趙 慶録, 大蔵 一真, and 浅田 邦博,
(in Japanese) "パイプライン構造をもつ非同期プロセッサの制御,"
１９９２年電子情報通信学会春期全国大会, pp.A-97, 1992,
- 大蔵 一真, 趙 慶録, and 浅田 邦博,
(in Japanese) "2線式論理を用いたデータパスの設計,"
１９９２年電子情報通信学会春期全国大会, pp.A-98, 1992,
- 西山 隆裕, 藤島 実, and 浅田 邦博,
(in Japanese) "境界要素法による3次元容量解析式の評価,"
１９９２年電子情報通信学会春期全国大会, C-523,pp.5-144, 1992,
- 張 洪明 and 浅田 邦博,
"Layout Design with Two Dimension MOSFET Cells,"
電子情報通信学会論文誌, Vol.J75-A,No.5,pp.960-962, 1992,
- 藤島 実, 山下 雅樹, 池田 誠, 浅田 邦博, 菅野 卓雄, 大村 泰久, 泉 勝俊, and 酒井 徹志,
"0.1-μm Low-Power Frequency-Divider Fabricated on Ultra-thin SIMOX Substrate,"
電子情報通信学会招待論文, ED92-61,ICD92-46,pp.31-38, 1992,
- 張 洪明 and 浅田 邦博,
"An optimal layout method for non-series-parallel CMOS network,"
１９９２年電子情報通信学会秋季全国大会, A-61,pp.1-61, 1992,
- 藤島 実 and 浅田 邦博,
"Drain-Current Modeling for Deep-Submicron MOSFETs,"
第５３回応用物理学会学術講演会, 17a-SE-9,pp.610, 1992,
- 池田 誠 and 浅田 邦博,
"Optimum Signal Swing for Reduced Voltage Bus Lines,"
１９９２年電子情報通信学会秋季全国大会, C-429,pp.5-109, 1992,
- T. Ohmameuda, H. Miki, K. Asada, T. Sugano, and Y. Ohji,
"Thermodynamical Calculation and Experimental Confirmation of the Density of Hole Traps in SiO2 Films,"
Japanese Journal of Applied Physics, Vol.30,No.12A,pp.L1993-L1995, Dec. 1991,