- K.Xu, T. Iizuka, T.Nakura and K. Asada, ,
"Resonant Power Supply Noise Reduction Using a Triangular Active Charge Injection,"
in Proceedings of IEICE General Conference 2016 Mar.2016.
- Masahiro Kano, Toru Nakura and Kunihiro Asada,
"Analysis and Design of a Triangular Active Charge Injection for Stabilizing Resonant Power Supply Noise,"
17th International Symposium on Quality Electronic Design (ISQED), Mar.2016.
- Md. Maruf Hossain, Tetsuya Iizuka, Toru Nakura and Kunihiro Asada,
"Analytical Design Optimization of Sub-ranging ADC Based on Stochastic Comparator,"
IEEE/ACM Design, Automation and Test in Europe (DATE) Exhibition and Conference, Mar.2016.
- T. Kikkawa, T. Nakura, K. Asada,
"An on-chip Measurement of PLL Transfer Function and Lock Range through Fully Digital Interface,"
IEICE Trans. on Electronics, Vol. E99-C, No.2, pp. 275-284,Feb.2016.
- Masahiro Ishida, Toru Nakura, Takashi Kusaka, Satoshi Komatsu, and Kunihiro Asada,
"Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills in Device Testing",
Journal of Electronic Testing: Theory and Applications, Vol 32(3), pp. 257-271,2016.
- Rimon Ikeno, Satoshi Maruyama, Yoshio Mita, Makoto Ikeda, and Kunihiro Asada,
"Electron beam lithography with character projection technique for high-throughput exposure with line-edge quality control",
Journal of Micro/Nanolithography, MEMS, and MOEMS, 15(3), 31606,2016.
- Tetsuya Iizuka and Asad A. Abidi,
"FET-R-C Circuits: A Unified Treatment—Part II: Extension to Multi-Paths, Noise Figure, and Driving-Point Impedance",
IEEE Transactions on Circuits and Systems-I: Regular Papers, Vol 63, No. 9, pp. 1337-1348,2016.
- Tetsuya Iizuka and Asad A. Abidi,
"FET-R-C Circuits: A Unified Treatment—Part I: Signal Transfer Characteristics of a Single-Path",
IEEE Transactions on Circuits and Systems-I: Regular Papers, Vol 63, No. 9, pp. 1325-1336,2016.
- Xiao Yang, Hongbo Zhu, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada,
"A 15× 15 single photon avalanche diode sensor featuring breakdown pixels extraction architecture for efficient data readout",
Japanese Journal of Applied Physics, Vol 55, No. 4S, pp. 04EF04,2016.
- Xiao Yang, Hongbo Zhu, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada,
"An Asynchronous Summation Circuit for Noise Filtering in Single Photon Avalanche Diode Sensors,"
Journal of Circuits, Systems and Computers (JSCS), Vol. 25, No. 3,(2016)1640017.
- Norihito Tohge, Tetsuya Iizuka, Toru Nakura, Satoshi Miura, Yoshimichi Murakami, and Kunihiro Asada,
"A Design of a Quick-Lock All-Digital CDR with Improved Jitter Performance by Fractional Phase Selection Technique,"
IEICE Technical Report, Vol. 115, No. 340, pp. 17-22, Dec.2015.
- Md. Maruf Hossain, Tetsuya Iizuka, Toru Nakura and Kunihiro Asada,
“Performance Analysis of Analog to Digital Converter based on Stochastic Comparator(統計的コンパレータを用いたアナログ‐ディジタル変換回路の性能解析),"
IEICE Technical Committee Meeting on Integrated Circuits and Devices, Kyoto Institute of Technology,Dec.2015.
- Tomohiko Yano, Toru Nakura, Tetsuya Iizuka and Kunihiro Asada,
“A Time-Mode Analog Signal Accumulator Using a Single Buffer Ring
without Output Drift Calibration(バッファリングを利用した出力ドリフト補正が不要な時間領域
アナログ信号積分器),"
IEICE Technical Committee Meeting on Integrated Circuits and Devices, Kyoto Institute of Technology,Dec.2015.
- Takashi Toi, Toru Nakura, Tetsuya Iizuka and Kunihiro Asada,
“Hill-Climbing法を用いたパルス幅制御PLLのPVTばらつきへの自動適応,"
IEICE Technical Committee Meeting on Integrated Circuits and Devices, Kyoto Institute of Technology,Dec.2015.
- Masahiro Ishida, Toru Nakura, Akira Matsukawa, Rimon Ikeno and Kunihiro Asada,
"A Technique for Analyzing On-chip Power Supply Impedance,"
Asian Test Symposium (ATS) 2015, 6B-1,Nov.2015.
- Tomohiko Yano, Toru Nakura, Tetsuya Iizuka and Kunihiro Asada,
"A Calibration-Free Time Difference Accumulator Using Two Pulses Propagating on a Single Buffer Ring,"
in IEEE Asian Solid-State Circuits Conference (A-SSCC) Proceedings of Technical Papers, pp. 145-148,Nov.2015.
- T. Ikeda, M. Ikeda,
"Comprehensive Study on Higher Order Radix RSA Cryptography Engine,"
in Proceedings of the IEEE 11th International Conference on ASIC (ASICON), P2-72,Nov.2015.
- Takehisa Koga, Tetsuya Iizuka, Toru Nakura, and Kunihiro Asada,,
"Design of Fine-Resolution Pulse Shrinking Time-to-Digital Converter,"
IEICE Technical Report, Vol. 115, No. 270, pp. 13-18, Oct.2015.
- Takashi Toi, Toru Nakura, Tetsuya Iizuka and Kunihiro Asada,
"Tracking PVT variations of Pulse Width Controlled PLL using Variable-Length Ring Oscillator,"
in Proceedings of IEEE Nordic Circuits and Systems Conference(NORCAS),Oct.2015.
- Chuanqi Cui, Makoto Ikeda,
"Evaluation of SEU Tolerance of Self-synchronous System Based on Dynamic Circuits(ダイナミック回路を用いた自己同期システムの SEU 耐性の評価),"
in Proceedings of the 2015 IEICE Society Conference, A-3-9,Sep.2015.