- H. Yamaoka, M. Ikeda, and K. Asada,
"A High-Speed and Area-Efficient Dual-Rail PLA Using Divided and Interdigitated Column Circuits,"
IEICE Trans. on Electronics,Vol. E87-C, No. 6, pp. 1069 -- 1077, Jun. 2004,
- Y. Oike, M. Ikeda, and K. Asada,
"Smart Image Sensor with High-Speed and High-Sensitivity ID Beacon Detection for Augmented Reality System,"
Journal of Image Information and Television Engineers, Vol. 58, No. 6, pp. 835 -- 841, Jun. 2004,
- Y. Oike, M. Ikeda, and K. Asada,
"Smart Access Image Sensors for High-Speed and High-Resolution 3-D Measurement Based on Light-Section Method,"
Int. Journal of Intelligent Automation and Soft Computing (AutoSoft), AutoSoft Press, Vol. 10, No. 2, pp. 105 -- 128, Jun. 2004,
- Y. Oike, M. Ikeda, and K. Asada,
"Design and Implementation of Real-Time 3-D Image Sensor With 640 x 480 Pixel Resolution,"
IEEE Journal of Solid-State Circuits, Vol. 39, No. 4, pp. 622 -- 628, Apr. 2004,
- H. Yamaoka, H. Yoshida, M. Ikeda, and K. Asada,
"A Logic-Cell-Embedded PLA (LCPLA): An Area-Efficient Dual-Rail Array Logic Architecture,"
IEICE Trans. Electron., vol. E87-C, no. 2, pp. 238-245, Feb. 2004,
- Y. Oike, M. Ikeda, and K. Asada,
"A 120 x 110 Position Sensor With the Capability of Sensitive and Selective Light Detection in Wide Dynamic Range for Robust Range Finding,"
IEEE Journal of Solid-State Circuits, Vol. 39, No. 1, pp. 246 - 251, Jan. 2004,
- Y. Oike, M. Ikeda, and K. Asada,
"A Row-Parallel Position Detector for High-Speed 3-D Camera Based on Light-Section Method,"
IEICE Trans. on Electronics, Vol. E86-C, No. 11, pp. 2320 - 2328, Nov. 2003,
- Y. Oike, M. Ikeda, and K. Asada,
"High Performance Photo Detector for Correlative Feeble Lighting Using Pixel-Parallel Sensing,"
IEEE Sensors Journal, vol. 3, no. 5, pp. 640 - 645, Oct. 2003,
- Y. Oike, H. Shintaku, M. Ikeda, and K. Asada,
"A High-Resolution and Real-Time 3-D Imaging System Based on Light-Section Method,"
Journal of Image Information and Television Engineers, Vol. 57, No. 9, pp. 1149 - 1151, Sep. 2003,
- Y. Oike, M. Ikeda, and K. Asada,
"A CMOS Image Sensor for High-Speed Active Range Finding Using Column-Parallel Time-Domain ADC and Position Encoder,"
IEEE Trans. on Electron Devices, Vol. 50, No. 1, pp.152 - 158, Jan. 2003,
- M. Ikeda, et al
"Frequency-dependent electrical characteristic of DNA using molecular dynamics simulation,"
Nanotechnology, Vol. 14, pp.123 - 127, Jan. 2003,
- K. Seto, M. Fujita, and K. Asada,
"Optimal Code Generation Based on Boolean Satisfiability,"
IPSJ Journal, Vol. 43, No. 5, May 2003,
- K. Asada, T. Nezuka, and Y. Oike,
"Smart Access Sensors,"
Optronics, vol. 20, no. 237, pp. 136 - 141, Sep. 2002,
- Y.Murakami and K. Asada,
"GTBT:Grounded-Trench-MOS Assisted Bipolar-Mode FET,"
IEICE Trans. on Electron., Vol. J85-C, No. 9, pp. 828 - 837, Sep. 2002,
- M. Song, K. Asada,
"Design of a Conditional Sign Decision Booth Encorder for a High Performance 32 x 32-Bit Digital Multiplier,"
IEICE Trans. on Electron., Vol. E85-C, No. 9, pp. 1709 - 1717, Sep. 2002,
- Ulkuhan Ekinciel, H. Yamaoka, and K. Asada,
"A Module Generator for Dual-Rail PLA with 2-Input Logic Cells,"
IEICE Society Conf.,A-3-7, pp.62, Sep. 2002,
- Yoshinori Murakami and K. Asada,
"GTBT:Development of a Grounded-Trench MOS-Assisted Bipolar-Mode FET,"
Electronics and Communications in Japan, Part2, Vol.87, No.3, pp.828-837, Sep. 2002,
- Y. Oike, M. Ikeda, and K. Asada,
"High-Sensitivity and Wide-Dynamic-Range Position Sensor Using Logarithmic-Response and Correlation Circuit,"
IEICE Trans. on Electronics, Vol. E85-C, No. 8, pp.1651 - 1658, Aug. 2002,
- T. Ishihara and K. Asada,
"A System Level Optimization Technique for Application Specific Low Power Memories ,"
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E84-A, No.11, pp.2755-2761, Nov. 2001,
- H. Yamaoka, M. Ikeda, and K. Asada,
"A High-Speed PLA using Dynamic Array Logic Circuits with Latch Sense,"
IEICE Transactions on Electronics, Vol.E84-C, No.9, pp.1240-1246, Sep. 2001,