- 趙 慶録, 田中 範明, and 浅田 邦博,
(in Japanese) "最小トランジスタ指標にもとづくCMOS複合ゲート型非同期順序回路の動作記述からの合成,"
電子情報通信学会論文誌, J74-B-I巻,3号,pp.489-498, 1991,
- K. Asada and J. Mayor,
"MOSYN: a MOS circuit synthesis program employing 3-way decomposition and reduction based on seven-valued logic,"
IEE Proceedings, Vol.137, Pt.E, No.6, pp.451-461, Nov. 1990,
- T. Shinohara, K. Asada, and T. Sugano,
"Performance Analysis of Polycrystalline Silicon Thin-Film Transistor Based on a Model of Depletion Layer Width Modelation at Gain Boundaries,"
Electronics and Communications in Japan, Part 2, Vol.73,No.7,pp.106-116, Jul. 1990,
- 立石 哲夫 and 浅田 邦博,
"A Statistical Modeling of Charge Redistribution A-D Converters for Yield Optimum Design,"
電子情報通信学会論文誌, A Vol.J73-A, No.8, pp.1359-1367, 1990,
- 戴 志堅 and 浅田 邦博,
(in Japanese) "最大許容遅延時間割付による多段複合MOS回路のトランジスタ寸法の2段階最適化手法,"
電子情報通信学会論文誌, J73-A巻,pp.526-536, 1990,
- F. Hatori, K. Asada, and T. Sugano,
"Cascade Model for Reduction of Field-Effect Mobility of Electrons in Lightly Deped Channel of Submicron Gate Si Thin-Film Field-Effect Transisters,"
Japanese Journal of Applied Physics, Vol.28,No.8,pp.1348-1353, Aug. 1989,
- S. Tanimoto, T. Mihara, K. Asada, and T. Sugano,
"A possible mechanism of electron injection for the threshold voltage shift of metal-oxide-semicondoctor field-effect transistors at low voltage ,"
Japanese Journal of Applied Physics, Vol.65, No.10, 1989,
- 篠原 俊朗, 浅田 邦博, and 菅野 卓雄,
(in Japanese) "粒界空乏層変調モデルによる多結晶シリコン薄膜トランジスタの動作シミュレーション,"
電子情報通信学会論文誌, C-Ⅱ巻,J72号,pp.919-926, 1989,
- 藤島 実, 浅田 邦博, and 菅野 卓雄,
(in Japanese) "複合構造を用いた相補型BiCMOS回路,"
電子情報通信学会論文誌, J72巻,12号,pp.1171-1174, 1989,
- H. Miki, M. Noguchi, K. Yokogawa, B. W. Kim, K. Asada, and T. Sugano,
"Electron and Hole Traps in SiO2 Films Thermally Grown on Si Substrates in Ultra-Dry Oxygen,"
IEEE Transaction on Electron Devices, Vol.35,No.12,pp.2245-2252, Dec. 1988,
- W. H. Lee, T. Osakama, K. Asada, and T. Sugano,
"Design Methodology and Size Limitations of Submicrometer MOSFET's for DRAM Application,"
IEEE Transactions on Electron Devices, Vol.35,No.11,pp.1876-1884, Nov. 1988,
- K. Asada and J. Mavor,
"A MOS Leaf-Cell Generation System from Booleam Expressims,"
Proceeding of the IEEE 1987 Custom Integrated Circuit Conference, pp.25-28, 1987,
- K. Throngnumchai, K. Asada, and T. Sugano,
"Modeling of 0.1 μm MOSFET on SOI Structure Using Monte Carlo Simulation Technique,"
IEEE Transaction Electron Devices, Vol.ED-33,No.7,pp.1005-1011, Jul. 1986,
- E. M. Murray, T. Sugano, and K. Asada,
"The Characterization of the Variability of Silicon Wafers by Leakage Current Measurements,"
Japanese Journal of Applied Physics, Vol.25,No.2,pp.L99-L101, Feb. 1986,
- N. Haneji, F. Arai, K. Asada, and T. Sugano,
"Anodic Oxidation of Si in Oxygen/Chlorine Plasma,"
IEEE Transaction on Electron Devices, Vol.Ed-32N,No.2,pp.100-105, 1985,
- 吉田 育生, 浅田 邦博, and 菅野 卓雄,
(in Japanese) "縮小CMOS,nMOSインバータのシミュレーションによる性能評価,"
電子通信学会論文誌, J66-C巻,12号,p.1019-1026, 1983,
- 羽路 伸夫, 浅田 邦博, and 菅野 卓雄,
(in Japanese) "ディジタル化電子なだれ注入装置の試作とSiO2中の捕獲中心面密度分布の新しい算出法,"
電子通信学会論文誌, J66-C巻,12号,p.1067-1071, 1983,
- K. Asada and T. Sugano,
"Automatic Deconvolution in DLTS Signals Analysis,"
The Transaction of the IECE of Japan, Vol.E65,No12,pp.745-749, Dec. 1982,
- グェン ニユット, 浅田 邦博, 大山, 斉藤, and 猪瀬,
(in Japanese) "環状結合網を用いた分散型データフロー計算機の一方式,"
電気通信学会論文誌, Vol.J65-D,No.12,p.1528, Dec. 1982,
- K. Asada and T. Sugano,
"Simple microcomputerbased apparatus for combined DLTS-C-V measurements,"
Review of Scientific Instruments, Vol.53,No.7,pp.1001-1006, Jul. 1982,